This course is intended for designers new to FPGAs design or programmable logic. Beginning with the architecture of Xilinx and Altera FPGA, the course will first provide the essential knowledge required to implement a design successfully using the software tools. The first part of the course will give students a head start on not just a fast design turn, but an elegant design as well. The second part of the course focuses on how to create more efficient designs to enhance overall performance. Student will learn how to create a faster design, fit the design into a smaller FPGA or a lower speed grade, thereby reducing the system cost and development time.
Duration of this course is 12 weeks with classes being held 2 sessions per week. In some cases 2 sessions are combined into one for convenience of students. Training duration per week consists of about 4-6 hours of instructor based training combined by about 6-4 hours of self practice for a total of about 10 hours per week. Tuition Fee for the course includes:
Please check the CalPT calendar for schedule or contact CalPT at info@CalPT.com. To register please call CalPT or send request to info@CalPT.com.